The present invention generally relates to fabrication methods and resulting structures for semiconductor devices. More particularly, the present invention relates to nanosheet field effect transistors (FETs).
As semiconductor integrated circuits (ICs) or chips become smaller, the implementation of stacked nanosheets in semiconductor devices has increased. Nanosheets are referred to as two-dimensional nanostructures with a thickness range on the order of about 1 nanometer (nm) to about 100 nm, and can facilitate the fabrication of non-planar semiconductor devices having a reduced footprint compared to conventional planar-type semiconductor devices. Accordingly, nanosheets and nanowires are seen as a feasible device options for reducing the footprints of semiconductor devices to 7 nanometers and beyond.